This invention relates to silicon-carbon and silicon germanium-carbon based materials system and more specifically, to a novel method and apparatus for depositing single crystal and polycrystalline layers of silicon-carbon (Si:C) and silicon germanium-carbon (SiGe:C) on a plurality of substrates at low temperatures and low pressures. A multiple wafer, low temperature growth technique is described for incorporating carbon epitaxially into Si and SiGe with very abrupt and well defined junctions, without any associated oxygen background contamination. Preferably, these silicon carbon alloy films are device quality, epitaxial layers which can be in-situ doped p- or n-type. A narrow base p-type device structure may be fabricated incorporating silicon-carbon and silicon germanium-carbon layers to form the base region of a high speed heterojunction bipolar transistor (HBT). The incorporation of a low concentration of carbon  less than 1020 atoms cmxe2x88x923 into the SiGe base region of a HBT can suppress boron outdiffusion and allow the use of high boron doping levels ( greater than  greater than 1019 cmxe2x88x923) in a very thin SiGe base base region ( less than 20 nm) without suffering the effects of boron outdiffusion from post-epitaxial thermal processing and anneals.
The next generation of SiGe HBTs suitable for wireless telecommunication systems, which operate at radio or microwave frequencies will be designed and targeted for very high speed SiGe bipolar devices having fT and fmax of over 100 GHz. Presently, state of the art SiGe-base heterojunction bipolar transistors (HBT""s) employ a graded SiGe structure to introduce an accelerating field across the base region in order to achieve high frequency performance from 45 to 90 GHz. Hence, to achieve SiGe bipolar devices with fT and fmax of over 100 GHz, another device enhancement or improvement will be required for the present graded SiGe based transistors. One possibility for performance enhancement is the scaling of the base width of the device, which is very difficult to achieve in manufacturing due to punch through of the base region. The key difficulty associated with base width scaling is in controlling the corresponding increase of the base doping to a high doping concentration to avoid punch through, which is very difficult to achieve in manufacturing. The effect of the base thickness on the high frequency performance of SiGe HBTs has been reported in a publication by E. Kasper et. al. entitled xe2x80x9cGrowth of 100 GHz SiGe-Heterobipolar Transistor (HBT) Structuresxe2x80x9d, Jpn. J. Appl. Phys. Vol. 33 Pt. 1, No. 4B, April 1994, pp. 2415-2418 which is incorporated herein by reference. The reference showed a steady increase of fT with the decreasing of the SiGe-base thicknesses. For example, starting with HBT""s with a 65 nm base thickness which did not exceed 20 GHz, transistors with a thinner 40 nm base width had yielded 37-52 GHz, while devices with even thinner 28-30 nm bases had exhibited even higher fT in the range of 58-91 GHz. Moreover, when the effective base thickness was further scaled down below 50% to a 25 nm or 22 nm base thickness an extremely high fT of 95-100 GHz was achieved corresponding to an increase of 4-5 times in fT and demonstrating the influence of base thickness on the speed of the bipolar transistor. However, it is important to note that in these very narrow base SiGe transistors the base doping concentration was in the extremely high range of about 8xc3x971019 boron/cm3 which is necessary in order to maintain a base sheet resistance of about 1.2 K-Ohm in such a thin 20 nm base region without punchthrough.
Subsequently, in order to combine and benefit from both these critical device enhancements for high speed performances in the present SiGe npn bipolar transistors, very high Ge content and more importantly very high boron doping concentration will be required in a thinner base region to achieve lower base sheet resistance and higher fmax transistor performance. A heavily doped SiGe base profile will effectively have a smaller band gap in the strained SiGe base offering a lower barrier for electron injection into the base and importantly, maintaining a lower base resistance and shorter transit time with the use of a thinner and highly doped boron doped SiGe base structure. However, such a thin heavily doped SiGe layered structure is very susceptible to dopant out-diffusion or re-distribution due to high concentration gradients during thermal treatments in the manufacturing process. In fact, one of the key problems in the present SiGe npn BiCMOS technology of one major manufacturer is to retain the narrow as-grown boron profile within the SiGe base layer and eliminate the undesirable out-diffusion of boron from the base region caused by heat treatments or transient enhanced diffusion (TED) from post-epitaxial processing of annealing implantation damages and CMOS integrations. Unfortunately, out diffusion of boron does present a severe problem since it limits the final achievable base-width in the base of the bipolar transistor regardless of how narrow the base-width may have been originally generated. Moreover, in cases where the boron diffuses or extends outside of the SiGe base region this can cause undesirable conduction band barriers to be formed at the base-collector junction which will degrade the collector current and subsequently the high frequency performance of the bipolar device.
The classic solution to this problem has been to accommodate the out-diffusion of boron rather than to resolve it, i.e. is to grow an extended undoped spacer of SiGe on either side of the doped base region between the emitter and collector regions. However, in such a case the technological problem then reverts back to minimizing and adjusting the thickness of the SiGe spacer layers in order to avoid strain-induced defect formation within the SiGe base structure. Moreover, even then, the thicknesses of the undoped spacer layers selected to alleviate or accommodate the out-diffusion problem is still restricted and limited by critical thickness considerations and there may not be suitable spacer layers to accommodate the out-diffusion of boron problem. The ideal solution to prevent or reduce the boron base dopant out-diffusion from occurring is a well known chemical effect that the presence or addition of carbon in a boron doped Si or SiGe layer can significantly reduce the out-diffusion of boron from the initial as-grown dopant profile. Moreover, H. J. Osten et. al., in the paper entitled xe2x80x9cCarbon Doped SiGe Heterojunction Bipolar Transistors for High Frequency Applicationsxe2x80x9d, IEEE BCTM 7.1, 1999, pp109-116, which is incorporated herein by reference, have recently shown that low carbon concentration ( less than 1020 atom.cmxe2x88x923) can significantly suppress boron out-diffusion without affecting the strain or band alignment and successful applications of carbon-rich layers for SiGe heterojunction bipolar transistors. Nevertheless, there exist a number of difficult material issues and problems associated with the growth of device quality SiC or SiGeC films. First, carbon has a very low equilibrium solid solubility in Si that is approximately 3.5xc3x971017 atoms.cmxe2x88x923 ( less than 10xe2x88x923 atomic %) at its melting point and it is even lower at the typical growth temperatures  less than 1000 C. Second, the presence of carbon contamination on a Si surface is know to disrupt the epitaxial growth and finally, there is a tendency to precipitate silicon carbide (beta-SiC) at high growth or annealing temperatures. Therefore, the biggest material problem is the ability to grow device quality Si:C and SiGe:C films at low temperatures, especially for the UHV-CVD process which is a fully manufacturable process currently being used in IBM""s BiCMOS technology.
A prior technique of UHV-CVD for depositing and fabricating very thin epitaxial layers having abrupt transitions in dopant concentration between adjacent single crystal layers at low temperatures is described in U.S. Pat. No. 5,906,680 which issued on May 25, 1999 to B. S. Meyerson entitled xe2x80x9cMethod and Apparatus for Low Temperature, Low Pressure Chemical Vapor Deposition of Epitaxial Silicon Layersxe2x80x9d and assigned to the assignee herein. In U.S. Pat. No. 5,906,680 an apparatus is described where the characteristic of the growth system is provided to have an ultrahigh vacuum integrity in the range of about 10xe2x88x929 Torr prior to epitaxial deposition at temperatures of less than 800xc2x0 C. Furthermore, the epitaxial silicon or silicon germanium layers can be doped in-situ to provide very abrupt defined regions of either n- or p-type conductivity. However, a suitable method for depositing silicon-carbon or silicon germanium-carbon by this technique has not yet been described.
The ability to grow and achieve high carbon concentrations in both device quality Si and SiGe films at low temperatures ( less than 550xc2x0 C.) has not been demonstrated by any other growth techniques or processes suitable for batch-size, manufacturing operations. There are, however, low temperature growth techniques such as molecular beam epitaxy (MBE), solid phase epitaxy regrowth and rapid thermal CVD (RT-CVD) which have been successfully employed to grow SiC and SiGeC layers with carbon levels up to 1%-3% carbon but often the material quality is not suitable for device applications.
In accordance with the present invention, an apparatus and process for achieving epitaxial silicon carbon and silicon germanium carbon films without the above mentioned problems is described, and in particular a manufacturable technique for batch processing of multiple wafers for the growth of expitaxial silicon carbon or silicon germanium carbon films thereon is provided. Furthermore, the fabrication of very thin epitaxial layers of silicon carbon or silicon germanium carbon having abrupt transitions of several atomic widths in carbon concentration between adjacent single crystal layers, which cannot be achieved by any prior art techniques, is provided. In the present invention, the temperatures and pressures of the growth technique are much less than those utilized in the prior art, and are such that the growth process is nonequilibrium in nature whereby the growth kinetics on the silicon containing surface, rather than the equilibrium thermodynamics of the inlet gases, dictate the deposition process. A hot wall, isothermal CVD apparatus as described in U.S. Pat. No. 5,906,680 is utilized whereby essentially no homogeneous gas phase pyrolysis of the silicon and/or carbon precursor such as silane or ethylene source gas occurs during the residence time, which is less than 1 second, within the selected temperature regime where the growth process is operated. Similar to U.S. Pat. No. 5,906,680 heterogeneous chemistry where kinetic reactions at the surface of the substrate occur by design of method and apparatus, are the primary determinants of epitiaxial deposition of silicon carbon and silicon germanium carbon films.
It is a primary object of the present invention to provide a method and apparatus for performing epitaxial single crystal deposition of silicon carbon layers in a batch process.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature epitaxy of silicon carbon layers having very low concentrations of oxygen contaminants in the SiC layers, preferably less than 1xc3x971017 O atoms cmxe2x88x923.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature epitaxy of silicon carbon layers in the temperature range from 475xc2x0 C. to 850xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing epitaxial single crystal deposition of silicon germanium carbon layers in a batch process.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature epitaxy of silicon germanium carbon layers having very low concentrations of oxygen contaminants in the SiGeC layers, preferably less than 1xc3x971017 O atoms cmxe2x88x923.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature epitaxy of silicon germanium carbon layers in the temperature range from 350xc2x0 C. to 850xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing polycrystalline deposition of silicon carbon layers in a batch process.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature polycrystalline deposition of silicon carbon layers having very low concentrations of oxygen contaminants in the SiC layers, preferably less than 1xc3x971017 O atoms cmxe2x88x923.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature deposition of polycrystalline silicon carbon layers in the temperature range from 475xc2x0 C. to 1200xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing deposition of polycrystalline silicon germanium carbon layers in a batch process.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature deposition of polycrystalline silicon germanium carbon layers having very low concentrations of oxygen contaminants in the SiGeC layers, preferably less than 1xc3x971017 O atoms cmxe2x88x923.
It is a further object of the present invention to provide an apparatus and method for enabling low temperature deposition of polycrystalline silicon germanium carbon layers in the temperature range from 350xc2x0 C. to 1200xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing in-situ p- or n-type doping of epitaxial single crystal silicon carbon layers which can withstand furnace anneals to temperatures of 850xc2x0 C. and rapid thermal anneal temperatures to 1000xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing in-situ p- or n-type doping of polycrystalline silicon carbon layers which can withstand furnace anneals to temperatures of 850xc2x0 C. and rapid thermal anneal temperatures to 1000xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing in-situ p- or n-type doping of epitaxial single crystal silicon germanium carbon layers which can withstand furnace anneals to temperatures of 850xc2x0 C. and rapid thermal anneal temperatures to 1000xc2x0 C.
It is a further object of the present invention to provide a method and apparatus for performing in-situ p- or n-type doping of polycrystalline silicon germanium carbon layers which can withstand furnace anneals to temperatures of 850xc2x0 C. and rapid thermal anneal temperatures to 1000xc2x0 C.